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Overview of the Interrupt Process

Overview of the Interrupt Process

Interrupts

Interrupts are events detected by the MCU which cause normal program flow to be preempted. Interrupts pause the current program and transfer control to a specified user-written firmware routine called the Interrupt Service Routine (ISR). The ISR processes the interrupt event, then resumes normal program flow.

This article shows how to enable and process interrupts on the PIC16F1xxx family of Enhanced Mid-Range PIC MCUs.

 

1) Program MCU to react to interrupts

The MCU must be programmed to enable interrupts to occur. Setting the Global Interrupt Enable (GIE) and, in many cases, the Peripheral Interrupt Enable (PEIE), enables the MCU to receive interrupts. GIE and PEIE are located in the Interrupt Control (INTCON) special function register.

 

2) Enable interrupts from selected peripherals

Each peripheral on the MCU has an individual enable bit. A peripheral's individual interrupt enable bit must be set in addition to GIE/PEIE before the peripheral can generate an interrupt. The individual interrupt enable bits are located in INTCON, PIE1, PIE2, and PIE3.

 

3) Peripheral asserts an interrupt request

When a peripheral reaches a state where program intervention is needed the peripheral sets an Interrupt Request Flag (xxIF). These Interrupt flags are set regardless of the status of the GIE, PEIE and individual interrupt enable bits. The interrupt flags are located in INTCON, PIR1, PIR2, and PIR3.

The interrupt request flags are latched high when set and must be cleared by the user-written Interrupt Service Routine.

 

4) Interrupt occurs

When an interrupt request flag is set and the interrupt is properly enabled, the interrupt process begins:

  • Global Interrupts are disabled by clearing GIE to 0.
  • The current program context is saved to the shadow registers.
  • The value of the Program Counter is stored on the return stack.
  • Program control is transferred to the interrupt vector at address 04h

 

5) Interrupt service routine (ISR) runs

The Interrupt Service Routine (ISR) is a function written by the user and placed at address 04h. The ISR does the following:

  1. Checks the interrupt-enabled peripherals for the source of the interrupt request.
  2. Performs the necessary peripheral tasks.
  3. Clears the appropriate interrupt request flag.
  4. Executes the Return From Interrupt instruction (RETFIE) as the final ISR instruction.

 

6) Control is returned to the Main program

When RETFIE is executed:

  1. Global Interrupts are enabled (GIE=1)
  2. The program context is restored from the Shadow Registers
  3. The return address from the stack is loaded into the Program Counter.
  4. Execution resumes from the point at which it was interrupted.