Core Registers
The first 12 entries of each PIC16F1xxx data memory bank contain registers referred to as the core registers. These 12 registers are repeated on each bank. The core registers can be accessed from any active bank.
Core Registers include information for:
- General Processing
- Direct Addressing of Memory
- Indirect Addressing of Memory
- Interrupt Control
General Processing Registers
STATUS Register
- TO: Indicates Watch Dog Timer has expired.
- PD: Sleep instruction status.
- Z: Indicates if last instruction resulted in a 0.
- DC: last instruction resulted in a carry-out from the 4th low-order bit.
- C: last instruction resulted in a carry-out from Most Significant Bit.
WREG Register
Referred to as the Working Register or W register, WREG serves as an accumulator.