Academic Program

DSP Engine

DSP Engine

dsPIC® DSC Block Diagram

The following is a general block diagram of the various core and peripheral modules in the dsPIC® family of devices. In purple, we can see the DSP engine.

DSCBlockDiagram.png

 

Digital Signal Processor (DSP) Engine

The DSP engine is a block of hardware that is fed with data from the W register array, but contains its own specialized result registers. The DSP engine consists of the following components:

  • High-speed 17-bit by 17-bit multiplier
  • Barrel shifter
  • 40-bit adder/subtractor
  • Two target accumulator registers
  • Rounding logic with selectable modes
  • Saturation logic with selectable modes
Elements.png

 

Data Paths

This is the data path through the accumulators, starting with single cycle accesses to from both X and Y data spaces

DataPaths.png

 

This data path bypasses the accumulators but uses the barrel shifter, extension and backfill logic

DataPaths2.png